,. analog lilli devices i cmos, 80 mhz monolithic 256 word power-down color palette ram-dacs adv4111adv415 i functional block diagram features persona' system/z- and vga- compatible 80, 88, 50 and 35 mhz pipelined op8rltion adv4781adv.71 (adv8) pin end functional compatible power.oown mode on-808rd voltage reference antilplrldl circuit anllog output comp8mors adv4t7: triple 8-8it d/a converters 211 )c 24 color palette ram 15 )( 24 ovlriay regllt8r8 adv476: triple i-bit d/a convlrtlra 2s8 )( 18 color p.l8tte ram 15 )c 18 overtly registers rs-m3airs-170 compatible outputs sync on in th channel. programmlble pedl8t8l +5 v cmos monolithic conltruction 44-pin plcc peckage appuca tlons high rl8olution color grephics cae/cad/cam appiicationa image pwoc8s8ing instrument81lon laptop comput8f8 de8ktop publishing available a.ock ra tis 80 mhz 88 mhz 50 mhz 3smhz gndal desciuption the adv477 and adv47s are pin-, functional-, and software- compatible ram-daca desiped specifically for penonal sys- tem/2 (ps/2) compatible color paphics. they are i ciircct plus- in uppade for the adv478 and adv471. both suppon the existiq 6-bit color vga standard while also allowing for an upgrade path to i-bit color resolution. mv ii . tndeguii of aujos dmce.. 18c. *r-at sjll8ml2, psf2, vga iuiii xga 8ft! tndaaub of ibtemadoaal a.u- mkuits corp. clock opa cofiit i0il 1'0 ", 'yll(; iwiic old au 100 108 ond dd of iid iii no 1111 riz iiote: - nameii ii pajlentmises delio,. adv477 the adv477 has a 256 x 24 color lookup table with triple i-bit video d/a converters. the adv475 bas a 256 x 18 color lookup table with triple 6-bit video d/a converters. new fca- tures on the adv4771adv47s include an on-board 1.2 v volt- if reference, ana1ob output comparators for self diaposucs and debugidg as well as a power-down or sleep mode. the power-down mode allows the adv477/adv475 to be put into a sleep mode with sipificant reduction in power consump- tion. this is ideal for laptop computers that may occasionally require the optional ability to drive an analog rgb monitor, but whose design is dictated by a desire to minimize power consumption. options on both parts include a programmable pedestal (0 or 7.s ire) and use of an external voltagc or tunent reference. 15 overlay registers provide for overlaying cursors, grids, menus, ega emulation, etco, at the hardware level. also sup- ported is a pixd read mask register and the ability to encode sync information on all three chandels. thc adv477/adv475 generates rs343a compatiblc vidco sig- nals into a doubly terminated 7s {} load, and rs-170 compatible video signals into a singly terminated 75 {} load, without requir- ing extemal buffering. this information applies to i product under development. its characteristics and specifications are subject to change without notice. analog devices assumes no obligation regarding future manufac:ture unlen otherwise agreed to in writing. rev. 0 information fvrnilhed by analog delli", il beliel/ed to be ,"urate and reliable. ho_ef. no relponsibility is assumed by analog del/ices for its un. nor for any infringements of pltents or oth.r rights of third plni.. which mly resuh from its use. no licens. is granted by implicltion or otherwise under any patent or patent rights of analog del/ices. om t8oii1ioiotv way. p.o. 80.8101. norwood. ma 020iz-"0i. u.s.a. tel: 1111329-4700 f..: 117/321-8703 twx: 7'0/""77 telex: 12448' cable: analog noillwooomau obsolete
rita' = 5 v: setup = 477/471 = vta: v.1f =1.235 vi adv477/adv475-specifications t=to3~~~'u~t.:~~:;~sa~.~7 0.111 spe~btions notes i :15" for 80 mhz add 66 mhz pull; :t: 1~ for so mhz and 35 mhz puts. itrmlmftture iwiae (tmin to tmax): o'c to + 7o'c. . iexeraal voimp'cumat refereaoe diubled. tempmture: +25 'c to +70 'c. all dilital iiipvlllt 0.. v. 4qock 8dd data fcodthroucb is i fuaaioll cl the amolldt of ovcnhoot iiid undmhoot do the diaital mpull. glitch impubc intludn clock and dati feed.through. s-rn. input values are 0 10 3 volll, with iiipiit riwfau lima "3 tii, jdeiiured the l~ and ~ poidli. timida reference point, it 50% for i!lpui8 iiid outpull. 'dacid"dac croutailt is iiiciiurd by hojdinc oiic dac hiah while the other two are dllkinliow to high 8dd hiah to low triiisiuoiis. spa:ifianiom iiibjea id djanate without notice. this information applies to ii product under development. its characteristics and specifications are subject to change without notice. anllog devicel ilium.. no obligltion regarding future manufacture unl... othflrwilo agreed to in writing. -2- rev. 0 i pa8metu adv4" adv475 udits t_t8 static pellfor.manci resoluucm (ead1 dac) s 6 biu acciilk)' (eldl dac) latepil noaiideuity :tl :0.25 lss diu diffcrmtw nodlinc:arity ::!:i %0.25 lss mas guannteed modotojlic: gray sc:iic error ::!:5 :!:5 % gray sc:a1c codida binary -.......- digital inputs input hiih vollqe, vdih 2 2 vmin input low voira8t, vihl 0.8 0.8 vmax input cum:nt, iin ::!:i :d jiamax vin = 0.4vor2.4v input clpeciiadcc, <1n 7 7 pf max f= 1 mhz. vin '" 2.4 v digital outputs output hi8h voitice. v om 2.4 2.4 vmin i30t1ilcii = 400 jia output low voi1qe; vol 0.4 0.4 vmax i" 3.2ma pioatina-sfate leibae cumdt 50 50 jialdu fioatin,-state labae c..apiiciildlz 7 7 pfldu analog outputs gfty sc8le cunat r.anae 20 20 ma max output cunalt whitt lcyd rdativc to bik)( 16.74 16.74 ma min typically 17.62 ida 18.50 is.so ma iiiu black ind relative to blank 0.95 0.95 ma min typially 1.44 ma, setup = v aa (pedt8ial - 7.5 ire) 1.90 1.90 ma iiiu black level rdative to bialik 0 0 jiamin typjcajly 5 jia. setup - gnd (pedestal '" 0 ire) 50 50 jiamas biuk lcvd 6.29 6.29 ma min typially 7.62 ida (s)'iic edabled) 8.96 8.96 ida iiiis blank levd 0 0 jiamid typitaiiy 5 jw\ (s)'iic diaabied) 50 50 jw\max syuc: 0 0 jw\min typiwiy 5 ji.a so so jiamax lsd au:c 69.1 279.68 jia typ dac to dac matdaida 5 5 % diu typica11y2% output l"""'piiadcc. v oc -i -1 vmin +1.5 +1.5 v diu output c.p8"i". carr 30 30 pf iiiis f- uuh.iout = oma output impeducc, rout 10 10 kotyp voltage jleference idw1ii1 vole.. rcfaeuc:c 1.1/1.3 1.1/1.3 v miniv idu typically 1.235 v beniil vol. ltda'cllce radae 1.1411.26 1.1411.26 v miniv dill powell supply supply vol., vita 4.7s/5.25 4.75/5.25 v min/v dill 80 mhz lad 66 mhz parts 4.5015.50 4.5015.50 v min/v iiiu so mhz lad 35 mhz parts supply cunau, 1m notmil oper8tioa 200 200 ma max typically 160 ma power down mock" 10 10 ida dill typically 5 ma power supply reiectioa ratio 0.5 0.5 %jfibmu f.. 1 khz, comp '" 0.1 ",f dynamic performance ckx:k 8dd dam peedthrouah.. j -3() -3() dbtyp glitch 1m.." 75 75 pv sea typ dac to dac croutaik' -23 -23 dbryp obsolete
analog devlce5 fax-on-demand hotline - page ~ i ----- adv4111adv415 timing characteristics ' rim! ii 5 v; snup ii .j1im ii v,.: 'au ;; 1.235 v; rl ii 31.5 0, cl ii 10 pf: 1m := 147 o. am speclflcatidiis '. to ,.3, unless otherwise noted.) notes 1'j7l input y81ua are 0 to 3 volts, with input rilcl'fall tima s 3 ri, i1ic8stii'ai between the i~ ind 90% points. timilll reference points it ~ for inputs and outpull. aiiiioa oiltpvt ioici $ 10 pp, do-d7 output loici s 50 pp. see timin& doici in fiprc 21. z:t5" for 10 mhz and 66 mhz pua; ~ i~ for 50 mhz add 35 mhz puu. 'tciiipctiftzft rilif (t - 10 t awj: o'c to + 7o'c. ~j add ~ 1ft --.4 widi die ia8d cim1it at fiprt ) 8dd 1ft defiui u the time nquind for id output to - 0.4 vor 2.4 v. it, 8dd f.s 1ft daiwd rn. die -- tia8 -- ~ die dma ciiiipuilio clwip ~ o.s v -- bded with the c:in:uit m r,pn: 3. the _ural. number is the air8pcii8iid iiii:k 10 - die i8dci8 of diirjiai die 50 pf cllplcitar. 1bis - that the lima, t, 8dd r.. quoted ill the timin& charactcrittic8 are the mze viiua 6ir die dmce iiid . tiiidi 1ft ~t of _emal bua io8dijii clplcilldcel. "smjina - .. - clack aad daia fadthrolllh. specifotigat .m;.:t 1d .. without 1iiitigc. ~,,~-e.t - ...- iii.iii iii-'" - iii. dr (willi) cl- digital.iiiiivi1i i"'~ ~: s'iie. -'-1 alw.oooljl1llml 1i0il. log, ici8j 1- -- - ~""'t i. outputdfijo'filea8urldi'iioiithe_pointof'nii_idgfofci.otkto thi ... point of fuu.4cale tiwf8it\on. i. ~,. _ii fiioii the _1'o8if of fuu.?ale 1'iianiitioh to 'ni. output 11111- - 01 u8 fall'i.t'i') an:tg.it!ao (allvttsi. :i. 0u1put 1118e1fau. - ..-0 -- nti"", aho _1'oin'ni 01' pull-icali - figure 2a. video input/output timing analdo outi'uts 1i0il,100, io8j iiiiii x= ~mmy ~ figure 2b. video output vs. sense timing to 0i1tput pin +2.1v figurb 3. load circuit for bus access lind relinquish time this information applies to a product under development. its characteristics and specifications are subject to change without notice. analog device. aseumes no obligation regarding future manufacture unless otherwise agreed to in writing. rev. 0 -3- 80 mhz 66 mhz 50 mhz 3s mhz parameter venion version versiod version units conditions/comments r..... 80 66 so 35 mhz clock rate tl 10 10 10 10 ds min rso-rs2 setup time tz 10 10 10 10 ds min rso-rs2 hold time tj4 s s 5 5 ds min rd asserted to data bus drivc'll t: 40 40 40 40 us max rd asscned to data valid "s5 20 20 20 20 us max rd negated to data bus 3-stated s 5 5 5 5 ds min read data hold time t7 10 10 10 10 nsmin write data setup time t, 10 10 10 10 dsmin write data hold time it so so so so us min rd, wr pulse width low tlo 6 x t1) 6 x tl) 6 x tl) 6 x tl) namin rd. wr pul8c width hip tll 3 3 3 3 us min pixel and codtrol setup time tn 3 3 3 3 usmin pixel and control hold time tl) 12.5 15.15 20 28 ns min clock cycle time ii. 4 5 6 7 us min clock pulse width high time tis 4 5 6 9 ds min clock pulse width low time tll 30 30 30 30 us m.u analog output delay tl7 3 3 3 3 dstyp analoa output risclfall time tl.6 13 13 20 28 us diu adalolj output set:tlidb time t19 1 i 1 1 jiostyp sense output delay tsit 2 2 2 2 dsmu analog output skew tm 4 x tl) 4 x tn 4 x tu 4 x in dsmid pipeline delay obsolete
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